The present invention relates to semiconductor devices for sending and receiving optical signals in an optical transmission system, and more particularly relates to optoelectronic hybrid semiconductor devices including both optical elements for sending and receiving optical signals and electronic circuits for receiving, outputting, and processing electrical signals.
The enormous increase in the volume and the speed of communications in recent years has been accompanied by rapid advances in optical fiber communications. To date, high performance optical transmission systems capable of high-speed transmission have been achieved primarily for trunk lines, however, optical transmission systems available to subscribers, which are expected to be in increasing demand in the future, must not only be capable of high-speed transmission but also require lower priced and smaller semiconductor devices for sending and receiving optical signals.
A conventional method for packaging optical modules that send and receive optical signals is active alignment. With active alignment, in an optical transmission module employing a light-emitting element as an optical element, a lens is interposed between the light-emitting element and an optical fiber so as to optically couple the light-emitting device and the optical fiber. When a light-emitting element and an optical fiber are optically coupled, the optical output of the light-emitting element is monitored as the optical axes of the light-emitting element and the optical fiber are adjusted with sub-micron order precision from the end of the optical fiber that is opposite the end coupled to the light-emitting element. For this reason, a reduction in costs is difficult because packaging requires a large number of components and adjusting the optical axes is time consuming.
On the other hand, passive alignment has been developed as a planar packaging technique that allows costs to be curbed. With passive alignment, an optical element and an optical fiber are optically coupled by direct coupling without employing a lens, allowing the optical element and the optical fiber to be packaged onto a flat packaging substrate without making adjustments.
As an example, a V-shaped groove (hereinafter, referred to as a V-groove) for positioning and holding the optical fiber is provided on a silicon substrate, and an optical fiber is sandwiched and fastened in the V-groove. In addition, an optical element chip is packaged adjacent to the optical fiber. Marks for alignment are formed on the optical element chip and on the silicon substrate in advance, and these marks are used for alignment during packaging.
Consequently, the optical fiber and the optical element can be optically coupled accurately without monitoring the optical output during packaging while aligning them, and thus compared to an active alignment technique, the number of components can be reduced and costs can be reduced by shortening the packaging time.
On the other hand, attempts are also being made to reduce costs and achieve smaller sizes for semiconductor integrated circuits that connect to optical modules and that receive, output, and process electrical signals.
Examples of semiconductor integrated circuits that are connected to an optical module include, in the case of an optical transmission module employing a light-emitting element as the optical element, a light-emitting element drive circuit and a multiplexing circuit, and in the case of an optical reception module employing a light-receiving element as the optical element, a pre-amplification circuit, an equivalent amplification circuit, a timing detection circuit, an identification and reproduction circuit, and an isolation circuit.
For these semiconductor integrated circuits, lower costs and smaller sizes have been achieved by reducing the number of chips through miniaturizing and highly integrating the manufacturing processes and by reducing the packaging area by using multi-chip modules using bare chip packaging.
In an effort to further reduce costs and size and achieve higher speeds, so-called optoelectronic hybrid modules, in which a semiconductor integrated circuit for receiving, outputting, and processing electrical signals with an optical element is provided inside an optical module, have been developed. By providing the function of a light-emitting drive circuit, a multiplexing circuit, a pre-amplification circuit, an equivalent amplification circuit, a timing detection circuit, an identification and reproduction circuit, or an isolation circuit, for example, in a semiconductor integrated circuit to be packaged inside an optical module, it is possible to reduce the costs and size and raise the speed of optical transmission systems. Hereinafter, conventional examples of an optoelectronic hybrid module are described.
As a first conventional example, the optoelectronic hybrid module disclosed by Kawatani et al. (“Packaging Techniques for Surface Packaged Optical Transmission/Reception,” Institute of Electronics, Communications, and Information Engineers Technical Report, LQE97-65(1997-08)) will be described with reference to the drawings.
FIG. 12 is a diagram representing the structure of the optoelectronic hybrid module disclosed by Kawatani et al. As shown in FIG. 12, in an optoelectronic hybrid module 500, a V-groove 501a is formed on a silicon substrate 501, and an optical element chip 502 and an optical fiber 503 are packaged adjacent to one another on the silicon substrate 501 and are optically coupled. The silicon substrate 501 and a semiconductor integrated circuit chip 504 are hybrid packaged onto a package 505, and the optical element chip 502 and the semiconductor integrated circuit chip 504 are connected to wiring on the package 505 by bonding wires.
Here, the V-groove 501a that is provided on the silicon substrate 501 must normally be about 2 mm in length in order to stably fasten the optical fiber 503, and thus the area of the region on the silicon substrate 501 that is required for providing the V-groove (hereinafter, referred to as the optical fiber packaging region) must be about several mm2.
With this first conventional example, if only the optical element chip 502 and the optical fiber 503 are packaged on the silicon substrate 501, then the area of the silicon substrate 501 is substantially determined by the area of the optical fiber packaging region. Also, the semiconductor integrated circuit chip 504 is at least several mm2 in size, and both the optical fiber packaging region and the semiconductor integrated circuit chip 504 occupy the majority of the area occupied by the optoelectronic hybrid module.
Consequently, because the silicon substrate 501 on which the V-groove 501a has been formed and the semiconductor integrated circuit chip 504 are arranged separately on the upper face of the package 505, the optoelectronic hybrid module cannot be made sufficiently small.
Also, bonding wires are used to connect the optical element chip 502 to the wiring on the silicon substrate 501 and the semiconductor integrated circuit chip 504 to the wiring on the package 505, and thus the parasitic inductance therefrom is a major obstacle to increasing the speed of signal transmission.
As a second conventional example, the optoelectronic hybrid module disclosed by Yamada et al. (JP H08-78657A, “Optic/Electronic Hybrid Packaged Substrate and Method For Manufacturing the Same, Optical Sub-Module, and Optic/Electronic Hybrid Integrated Circuit”) will be described with reference to the drawings.
FIG. 13 is a diagram illustrating the structure of the optoelectronic hybrid module disclosed by Yamada et al. As shown in FIG. 13, with an optoelectronic hybrid module 600, an optical element chip 602, an optical fiber 603, and a semiconductor integrated circuit chip 604 are hybrid packaged onto the surface of a silicon substrate 601 in which a V-groove has been formed. The optical element chip 602 and the semiconductor integrated circuit chip 604 are bump-connected to wiring 605 on the silicon substrate 601 through flip-chip bonding. On the other hand, the wiring 605 on the silicon substrate 601 is connected by bonding wires to wiring provided in a package (not shown) on which the optoelectronic hybrid module 600 is placed.
According to this second conventional example, the length of the wiring connecting the optical element chip 602 and the semiconductor integrated circuit chip 604 is significantly shortened, so that compared to the first conventional example, parasitic inductance is significantly reduced, allowing for faster signal transmission speeds between the optical element chip 602 and the semiconductor integrated circuit chip 604. Also, both the V-groove for fastening the optical fiber 603 and the semiconductor integrated circuit chip 604 are mounted onto the upper face of the silicon substrate 601, and thus smaller sizes can be achieved than with the first conventional example.
However, with the second conventional example, the optical fiber packaging region, which occupies a large area, and the semiconductor integrated circuit chip 604 each occupies an area of the upper face of the silicon substrate 601, and thus a sufficient reduction in size cannot be achieved.
As a third conventional example, the optoelectronic hybrid module disclosed by Kawatani et al. (JP H10-303466A, “Optical Semiconductor Device and Method For Manufacturing the Same”) is described with reference to the drawings.
FIG. 14A is a diagram illustrating the structure of the optoelectronic module disclosed by Kawatani et al., and as shown in FIG. 14A, an optoelectronic hybrid module 700 includes a silicon substrate 701 in which a V-groove 701a is formed in an optical fiber packaging region R1 and a semiconductor integrated circuit 702 is monolithically formed in an optical element packaging region R2. An optical element chip 703 is packaged onto the optical element packaging region R2 by bump-connection using flip-chip bonding. The semiconductor integrated circuit 702 is connected by a bonding wire to wiring provided in a package (not shown) on which the optoelectronic hybrid module 700 is placed.
With the configuration according to the third conventional example, the optical element chip 703 and the semiconductor integrated circuit 702 are bump-connected, and thus the speed of signal transmission between them can be increased. Also, the V-groove 701a and the semiconductor integrated circuit 702 are monolithically formed on the silicon substrate 701, allowing for a further reduction in size over the first and the second conventional examples.
However, with the optoelectronic hybrid module 700 in FIG. 14A, in order to fabricate the semiconductor integrated circuit 702 used in the optical transmission system on the silicon substrate 701, numerous complex processes with miniature processing geometry must be repeatedly performed in the process for manufacturing the semiconductor. For that reason, the manufacturing cost per unit area is more than ten times that for a silicon substrate in which only a V-groove for fastening the optical fiber and wiring are formed. Consequently, the manufacturing costs for the configuration of the third conventional example are much higher than the manufacturing costs when a silicon substrate on which only a V-groove and wiring have been formed and the semiconductor integrated circuit chip are formed independently, and this runs counter to reducing the costs of the optical transmission system.
In particular, because a predetermined area is required for the optical fiber packaging region R1 and the area of the region in which the semiconductor integrated circuit 702, which is required for using an optical element in an optical transmission system, is formed is also required, the chip becomes large in size and manufacturing costs are increased.
Also, with the third conventional example, there is a problem that it is difficult to precisely control the distance between the optical element chip 703 and the end face of the optical fiber. More specifically, in order to reduce packaging costs, the end face of the V-groove 701a on the optical element chip 703 side must be formed perpendicular to the direction in which the V-groove 701a extends so that it is possible to carry out packaging without adjustments by pressing the end face of the optical fiber against the end face of the V-groove 701a. However, with the third conventional example, the V-groove 701a is formed through etching, and thus it is difficult to perpendicularly form the end portion of the V-groove 701a on the optical element chip 703 side.
Consequently, in a practical silicon substrate 701, it is necessary to form a groove portion for adjusting the distance between the optical element chip 703 and the end face of the optical fiber in order to form a T-shape with the end portion of the V-groove 701a serving as the point of contact between them.
FIG. 14B is a perspective view showing an optoelectronic hybrid module according to the third conventional example in which an alignment groove has been provided in the semiconductor device. As shown in FIG. 14B, an alignment groove 701b has been formed in the silicon substrate 701 so as to form a T-shape with the V-groove 701a including the end portion of the V-groove 701a on the side of the optical element chip 703.
Thus, the end face of the optical fiber is pushed along the V-groove 701a so that it comes into contact with the wall of the alignment groove 701b, so that the optical axes of the optical fiber and the optical element chip 703 are aligned and the distance between the end face of the optical fiber and the optical element chip 703 can be adjusted.
However, because the alignment groove 701b is formed in a such a way that it partitions the upper face of the silicon substrate 701, if the semiconductor integrated circuit 702 is formed between the optical fiber packaging region R1 and the optical element packaging region R2, then it becomes necessary to use bonding wiring 704 to connect the semiconductor integrated circuit 702 of the optical fiber packaging region R1 and the semiconductor integrated circuit 702 of the optical element packaging region R2. Consequently, the transmission speed of the semiconductor device is lowered by parasitic inductance of the bonding wiring 704.
On the other hand, when a configuration is adopted in which the bonding wiring 704 is not used so as to ensure the transmission speed of the semiconductor device, the semiconductor integrated circuit 702 is formed having increased area in the optical element packaging region R2, which increases the chip size and raises manufacturing costs.
Thus, there is the problem that it is difficult to simultaneously achieve smaller size, lower costs, and higher speeds with the optoelectronic hybrid modules of the first through third conventional examples.